- Oct 12, 2015
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Geert Uytterhoeven authored
484adb00 ("ARM: shmobile: r8a7790 dtsi: Add CPG/MSTP Clock Domain") added CPG/MSTP clock-cells domain support, but it was missing sound support. This patch adds it. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Tested-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> [horms: Updated commit id referred to in changelog] Signed-off-by:
Simon Horman <horms+renesas@verge.net.au> (cherry picked from commit 6507c4ef ) Signed-off-by:
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- Sep 14, 2015
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Geert Uytterhoeven authored
Add an appropriate "#power-domain-cells" property to the cpg_clocks device node, to create the CPG/MSTP Clock Domain. Add "power-domains" properties to all device nodes for devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock. This applies to most on-SoC devices, which have a one-to-one mapping from SoC device to DT device node. Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
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Geert Uytterhoeven authored
Add an appropriate "#power-domain-cells" property to the cpg_clocks device node, to create the CPG/MSTP Clock Domain. Add "power-domains" properties to all device nodes for devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock. This applies to most on-SoC devices, which have a one-to-one mapping from SoC device to DT device node. Signed-off-by:
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Geert Uytterhoeven authored
Add an appropriate "#power-domain-cells" property to the cpg_clocks device node, to create the CPG/MSTP Clock Domain. Add "power-domains" properties to all device nodes for devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock. This applies to most on-SoC devices, which have a one-to-one mapping from SoC device to DT device node. Notable exceptions are the "display" and "sound" nodes, which represent multiple SoC devices, each having their own MSTP clocks. Signed-off-by:
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Geert Uytterhoeven authored
Add an appropriate "#power-domain-cells" property to the cpg_clocks device node, to create the CPG/MSTP Clock Domain. Add "power-domains" properties to all device nodes for devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock. This applies to most on-SoC devices, which have a one-to-one mapping from SoC device to DT device node. Notable exceptions are the "display" and "sound" nodes, which represent multiple SoC devices, each having their own MSTP clocks. Signed-off-by:
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Geert Uytterhoeven authored
Add an appropriate "#power-domain-cells" property to the cpg_clocks device node, to create the CPG/MSTP Clock Domain. Add "power-domains" properties to all device nodes for devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock. This applies to most on-SoC devices, which have a one-to-one mapping from SoC device to DT device node. Signed-off-by:
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Geert Uytterhoeven authored
Add an appropriate "#power-domain-cells" property to the cpg_clocks device node, to create the CPG/MSTP Clock Domain. Add "power-domains" properties to all device nodes for devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock. This applies to most on-SoC devices, which have a one-to-one mapping from SoC device to DT device node. A notable exception is the "sound" node, which represents multiple SoC devices, each having their own MSTP clocks. Signed-off-by:
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Geert Uytterhoeven authored
Add an appropriate "#power-domain-cells" property to the cpg_clocks device node, to create the CPG/MSTP Clock Domain. Add "power-domains" properties to all device nodes for devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock. This applies to most on-SoC devices, which have a one-to-one mapping from SoC device to DT device node. Signed-off-by:
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Geert Uytterhoeven authored
If a GPIO driver uses gpiochip_add_pin_range() (which is usually the case for GPIO/PFC combos), the GPIO hogging mechanism configured from DT doesn't work: requesting hog GPIO led1-high (chip sh73a0_pfc, offset 20) failed The actual error code is -517 == -EPROBE_DEFER. The problem is that PFC+GPIO registration is handled in multiple steps: 1. pinctrl_register(), 2. gpiochip_add(), 3. gpiochip_add_pin_range(). Configuration of the hogs is handled in gpiochip_add(): gpiochip_add of_gpiochip_add of_gpiochip_scan_hogs gpiod_hog gpiochip_request_own_desc __gpiod_request chip->request pinctrl_request_gpio pinctrl_get_device_gpio_range However, at this point the GPIO controller hasn't been added to pinctrldev_list yet, so the range can't be found, and the operation fails with -EPROBE_DEFER. To fix this, add a "gpio-ranges" property to the gpio device node, so the ranges are added by of_gpiochip_add_pin_range(), which is called by of_gpiochip_add() before the call to of_gpiochip_scan_hogs(). Signed-off-by:Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Geert Uytterhoeven authored
If a GPIO driver uses gpiochip_add_pin_range() (which is usually the case for GPIO/PFC combos), the GPIO hogging mechanism configured from DT doesn't work: requesting hog GPIO lcd0 (chip r8a7740_pfc, offset 176) failed The actual error code is -517 == -EPROBE_DEFER. The problem is that PFC+GPIO registration is handled in multiple steps: 1. pinctrl_register(), 2. gpiochip_add(), 3. gpiochip_add_pin_range(). Configuration of the hogs is handled in gpiochip_add(): gpiochip_add of_gpiochip_add of_gpiochip_scan_hogs gpiod_hog gpiochip_request_own_desc __gpiod_request chip->request pinctrl_request_gpio pinctrl_get_device_gpio_range However, at this point the GPIO controller hasn't been added to pinctrldev_list yet, so the range can't be found, and the operation fails with -EPROBE_DEFER. To fix this, add a "gpio-ranges" property to the gpio device node, so the range is added by of_gpiochip_add_pin_range(), which is called by of_gpiochip_add() before the call to of_gpiochip_scan_hogs(). Signed-off-by: -
Geert Uytterhoeven authored
If a GPIO driver uses gpiochip_add_pin_range() (which is usually the case for GPIO/PFC combos), the GPIO hogging mechanism configured from DT doesn't work: requesting hog GPIO led1-high (chip r8a73a4_pfc, offset 28) failed The actual error code is -517 == -EPROBE_DEFER. The problem is that PFC+GPIO registration is handled in multiple steps: 1. pinctrl_register(), 2. gpiochip_add(), 3. gpiochip_add_pin_range(). Configuration of the hogs is handled in gpiochip_add(): gpiochip_add of_gpiochip_add of_gpiochip_scan_hogs gpiod_hog gpiochip_request_own_desc __gpiod_request chip->request pinctrl_request_gpio pinctrl_get_device_gpio_range However, at this point the GPIO controller hasn't been added to pinctrldev_list yet, so the range can't be found, and the operation fails with -EPROBE_DEFER. To fix this, add a "gpio-ranges" property to the gpio device node, so the ranges are added by of_gpiochip_add_pin_range(), which is called by of_gpiochip_add() before the call to of_gpiochip_scan_hogs(). Signed-off-by: -
Sergei Shtylyov authored
Define the generic R8A7794 part of the MMCIF0 device node. Based on the orginal patch by Shinobu Uehara <shinobu.uehara.xc@renesas.com>. Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by:
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Sergei Shtylyov authored
Add the initial device tree for the R8A7794 SoC based SILK low cost board. SCIF2 serial port support is included, so that the serial console can work. Based on the original patch by Vladimir Barinov <vladimir.barinov@cogentembedded.com>. Signed-off-by:
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Sergei Shtylyov authored
Define the generic R8A7794 part of the PFC device node. Based on original patch by Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>. Signed-off-by:
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Mikhail Ulyanov authored
This patch contains device tree node definition for JPEG codec peripheral found in the Renesas R-Car r8a7791 SoC. Signed-off-by:
Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com> Signed-off-by:
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Mikhail Ulyanov authored
This patch contains device tree node definition for JPEG codec peripheral found in the Renesas R-Car r8a7790 SoC. Signed-off-by:
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Magnus Damm authored
Now when the Marzen legacy board code is gone this patch removes the unused r8a7779 legacy SoC code. Signed-off-by:
Magnus Damm <damm+renesas@opensource.se> Acked-by:
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Magnus Damm authored
Remove Marzen legacy board code written in C. Instead board support expressed in DT shall be used together with Multiplatform and shmobile_defconfig. Signed-off-by:
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Magnus Damm authored
Remove unused function prototypes from r8a7779.h and make the functions static. Signed-off-by:
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Magnus Damm authored
The generic r8a7779 machine vector is now feature-wise equivalent to the Marzen-reference case, so simply remove the Marzen C board code to fall over on the generic r8a7779 machine vector. Signed-off-by:
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Simon Horman authored
This is selected by MACH_MARZEN which is enabled in shmobile_defconfig, however, MACH_MARZEN is going away along with the board code it enables. Acked-by:
Magnus Damm <damm@opensource.se> Acked-by:
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Kuninori Morimoto authored
Signed-off-by:
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Kuninori Morimoto authored
Signed-off-by:
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Kuninori Morimoto authored
Signed-off-by:
Keita Kobayashi <keita.kobayashi.ym@renesas.com> Signed-off-by:
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Kuninori Morimoto authored
Signed-off-by:
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Laurent Pinchart authored
The adv7511 IRQ is low level triggered, not falling edge triggered. The wrong sense configuration results in no interrupt being triggered at all, breaking hotplug detection. Fix it. Reported-by:
Ben Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by:
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Magnus Damm authored
Now when the Marzen legacy board code is removed also get rid of the marzen_defconfig file. Existing users shall move over to shmobile_defconfig. Signed-off-by:
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Kuninori Morimoto authored
This patch enables DPCM related sound card. It is used for... - Sampline rate convert - CTU/MIXer Note: you need to enable these settings on DTS file Signed-off-by:
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Kuninori Morimoto authored
It is easy to modify settings for Test or other purpose if sound has label Signed-off-by:
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Kuninori Morimoto authored
It is easy to modify settings for Test or other purpose if sound has label Signed-off-by:
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Wolfram Sang authored
Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by:
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Wolfram Sang authored
Signed-off-by:
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Magnus Damm authored
Add a r8a7779-specific SMP operation pointer to support all 4 CPU cores through SMP on r8a7779 without C board code. Signed-off-by:
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Magnus Damm authored
Add a r8a7779-specific callback to initialize CCF and clocksources. With this in place we are one step closer to be able to use r8a7779 without C board code. Also add a multiplatform wrapper to avoid breaking the r8a7779 marzen legacy case. Signed-off-by:
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Wolfram Sang authored
With shmobile_defconfig but SMP=n && SUSPEND=n, I get: arch/arm/mach-shmobile/platsmp-apmu.c:49:12: warning: 'apmu_power_off' defined but not used [-Wunused-function] arch/arm/mach-shmobile/platsmp-apmu.c:70:12: warning: 'apmu_wrap' defined but not used [-Wunused-function] Annotate those functions like the functions around it. Signed-off-by:
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Ulrich Hecht authored
Regulator setup seems identical to Koelsch. Signed-off-by:
Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by:
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Ulrich Hecht authored
Minimal support without power management or SMP. Signed-off-by:
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Geert Uytterhoeven authored
Signed-off-by:
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Geert Uytterhoeven authored
Signed-off-by:
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Geert Uytterhoeven authored
Simplify the power request code by passing an "on" flag, and picking the right status bit and register offset in the innermost function, based on this flag. This allows to remove the rcar_sysc_pwr_{off,on}() helper functions, and the function pointer through which they were called. Make sr_bit and reg_offs unsigned while we're at it. Signed-off-by:
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