- Nov 20, 2015
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Hiroyuki Yokoyama authored
If the audio route has SSI only, audio-dma stop timing is not correct. The correct order is as follows. 1. Stop SSI 2. Stop audio-dma Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Hiroyuki Yokoyama authored
This patch fixes the problem that DMA doesn't stop. This patch changes order. old : Stop SSI. Then, stop the Audio DMAC-pp. new : Stop Audio DMAC-pp. Then, stop the SSI. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Hiroyuki Yokoyama authored
This patch fixes definition mistake of SCU_SYSTEM_INT_ENABLE1 address. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Hiroyuki Yokoyama authored
The setting of WS continue bit moves before start of SSI. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Hiroyuki Yokoyama authored
This patch changes set timing of SRC_BUSIF_DALIGN. Furthermore the code is put in order with this correction. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Hiroyuki Yokoyama authored
SRC_ROUTE_MODE0 should be set before start. The setting of SRC_SRCIR moves other place. By this change, rsnd_src_start() function is removed. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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- Nov 19, 2015
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Hiroyuki Yokoyama authored
In case of not using DVC, capture : SSI(SSIU) -> SCU(SRC) -> External Memory. 1. stop SCU.SRC.start_out 2. stop audio dma-pp 3. stop SCU.SRC.start_in Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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- Nov 13, 2015
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Hiroyuki Yokoyama authored
Change order to follows. Base sequence at play: 1. start Audio DMAC-pp 2. start Audio DMAC 3. start SSI 4. start SSIU 5. start SCU(CMD) 6. start SCU(SRC) 7. stop SSI 8. stop Audio DMAC-pp 9. stop SSIU 10. stop SCU(CMD) 11. stop SCU(SRC) 12. stop Audio DMAC Base sequence at capture: 1. start Audio DMAC-pp 2. start Audio DMAC 3. start SCU(CMD) 4. start SCU(SRC) 5. start SSIU 6. start SSI 7. stop SCU(CMD) 8. stop Audio DMAC-pp 9. stop SCU(SRC) 10. stop SSIU 11. stop SSI 12. stop Audio DMAC Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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- Nov 12, 2015
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Hiroyuki Yokoyama authored
This control depends on the rsnd_soc_dai_trigger() function. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Hiroyuki Yokoyama authored
This control depends on the rsnd_soc_dai_trigger() function. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Hiroyuki Yokoyama authored
There is a need to modify the audio sequence. This patch is preparatory code to control the audio sequence. Add new operation ".dma_start" and ".dma_stop". Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Hiroyuki Yokoyama authored
This patch waits for idle mode status of SSI. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Hiroki Negishi authored
Fix the calculation of top location in post cropping with PI conversion enabled. Not for upstream merge. Signed-off-by: Hiroki Negishi <hiroki.negishi.zr@hitachi-solutions.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
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Hiroki Negishi authored
In PI conversion mode, VSP1 driver repeats a same buffer if there is a buffer in driver's buffer queue. The repeats are needed in case of DU output in order to continue to display images. However, in case of memory output, COMPOSITE mode, the repeats cause incorrect output. VSP1 extracts Top/Bottom fields from the same buffer, so an output image is the same as input. This patch fixes VSP1 driver so that VSP1 outputs correct images without repeats. Not for upstream merge. Signed-off-by: Hiroki Negishi <hiroki.negishi.zr@hitachi-solutions.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
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Yoshifumi Hosoya authored
When one frame is configured as shown below first field is an odd(1,3,5..) field second field is an even(2,4,6..) field Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
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Hiromitsu Yamasaki authored
When Tx DMA is only used, Tx FIFO is still not empty after DMA callback. This patch waits for sweeping data out of the Tx FIFO. Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
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- Nov 11, 2015
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Hiroyuki Yokoyama authored
- SRC0, SRC7-9 devices not exist. These clock definitions and sound route removed. But SRC0 setting is need, set to "unused=1". Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Hiroyuki Yokoyama authored
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
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Takeshi Kihara authored
This patch fixes the problem which lacked the definition of GPIO0 clock in r8a7794 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Takeshi Kihara authored
This reverts commit 67d867aa . Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Takeshi Kihara authored
Commit c789778d ("mmc: sh_mobile_sdhi: Increase SDHI clock rate to 195MHz") can update clk rate with the assigned value, when "renesas,clk-rate" property is set to device tree. However, when DIV6 clocks is being used for sdhi clock control, if sdhi clock is updated by clk_set_rate() during a clock stop, sdhi clock is enabled after that and clk_get_rate() is called, it returns a value not intended. This patch fixes the problem by enabling sdhi clock, before calling clk_set_rate(). Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Takeshi Kihara authored
Commit 6371c388 ("mmc: sh_mmcif: Increase MMCIF clock rate to 97.5MHz") can update clk rate with the assigned value, when "renesas,clk-rate" property is set to device tree. However, when DIV6 clocks is being used for mmc clock control, if mmc clock is updated by clk_set_rate() during a clock stop, mmc clock is enabled after that and clk_get_rate() is called, it returns a value not intended. This patch fixes the problem by enabling mmc clock, before calling clk_set_rate(). Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
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Takeshi Kihara authored
Return type of i2c_smbus_read_byte_data is s32 not u8. This patch adds an appropriate variable and fixes up the assignment. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Takeshi Kihara authored
This patch holds a supply voltage VIO33 to avoid a shutdown of the DA9063. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Takeshi Kihara authored
Return type of i2c_smbus_read_byte_data is s32 not u8. This patch adds an appropriate variable and fixes up the assignment. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Takeshi Kihara authored
This patch holds a supply voltage VIO33 to avoid a shutdown of the DA9063. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Takeshi Kihara authored
Return type of i2c_smbus_read_byte_data is s32 not u8. This patch adds an appropriate variable and fixes up the assignment. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Takeshi Kihara authored
This patch holds a supply voltage VIO33 to avoid a shutdown of the DA9063. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Takeshi Kihara authored
Return type of i2c_smbus_read_byte_data is s32 not u8. This patch adds an appropriate variable and fixes up the assignment. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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Takeshi Kihara authored
This patch holds a supply voltage VIO33 to avoid a shutdown of the DA9063. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
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- Nov 09, 2015
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Mitsuru Ezo authored
There is a case sci_dma_rx_complete() is called in the work_fn_rx() as follows. work_fn_rx() -> dma_async_is_tx_complete() -> device_tx_status() == shdma_tx_status() -> shdma_chan_ld_cleanup() -> __ld_cleanup() -> callback() == sci_dma_rx_complete() In this case, dma_rx_complete() tries to lock spinlock that is already locked from work_fn_rx(). In the result, deadlock occurs. Fix deadlock as follows. - Divide WorkQueue method into two: one is work_fn_rx(), for reception timeout. the other is a new method, work_fn_rx_complete(), for DMA transfer completion. - In reception timeout, work_fn_rx() keeps own process id until end of spinlock. - In DMA transfer completion, sci_dma_rx_complete() does not lock if kept process id is same as own process id. Signed-off-by: Mitsuru Ezo <mitsuru.ezo.pz@ps.hitachi-solutions.com> Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
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- Oct 23, 2015
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Kazuya Mizuguchi authored
Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
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Mitsuru Ezo authored
sci_start_tx() changes the SCSCR register, but does not lock sci_port. Therefore, a caller should lock sci_port. sci_tx_dma_release() does not lock sci_port in calling sci_start_tx(). This may cause conflicts of settings to the SCSCR register. So, this patch adds lock in sci_tx_dma_release(). Signed-off-by: Mitsuru Ezo <mitsuru.ezo.pz@ps.hitachi-solutions.com> Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
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Mitsuru Ezo authored
The SCSCR register access in sci_break_ctl() is not locked. The unlocked access may cause conflicts of settings to the SCSCR register. Therefore, this patch adds lock during register access in sci_break_ctl(). Signed-off-by: Mitsuru Ezo <mitsuru.ezo.pz@ps.hitachi-solutions.com> Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
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Mitsuru Ezo authored
There is deadlock as follows. work_fn_rx() spin_lock_irqsave() <- spin locked already here dev_err() <- request serial output ... serial_console_write() spin_lock() <- try to lock the spin <waits forever> This problem is caused by serial output request while spin is already locked. Serial output process tries to lock the spin and deadlock occured. Signed-off-by: Mitsuru Ezo <mitsuru.ezo.pz@ps.hitachi-solutions.com> Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
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Ryuichi Ando authored
Change the processing order of start-up and end of SCIF. < start-up(sci_startup()) > before: IRQ Start(sci_request_irq()) -> DMA Start(sci_request_dma()) After : DMA Start(sci_request_dma()) -> IRQ Start(sci_request_irq()) < end(sci_shutdown()) > before: DMA End(sci_free_dma()) -> IRQ End(sci_free_irq()) After : IRQ End(sci_free_irq()) -> DMA End(sci_free_dma()) Signed-off-by: Ryuichi Ando <ryuichi.ando.jz@ps.hitachi-solutions.com> Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
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Yoshihiro Shimoda authored
If CONFIG_SERIAL_SH_SCI_DMA is enabled, the driver doesn't enable TIE on SCIF or HSCIF. However, this driver may call sci_tx_interrupt() in sci_er_interrupt(). After that, the driver cannot care of the interrupt, and then "irq 109: nobody cared" happens on r8a7791/koelsch board. This patch fixes the issue. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [geert] Keep kicking tx when using PIO Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> (cherry picked from commit 440cc3afb74e91da35b296934e1efad5270355c7) Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
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- Oct 22, 2015
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Takashi Saito authored
Because the value of addr_c1 variable was wrong, this patch modifies to the corrected value. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
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Ryo Kataoka authored
DMA thread and interrupt process might be executed after TRIGGER_STOP. In that case, they might access NULL pointer since substream is invalid. This patch avoids these problem. This patch was created by referring to following commits. commit 02299d98 ("ASoC: rsnd: spin lock for interrupt handler") commit 12927a8f ("ASoC: rsnd: don't use rsnd_mod_to_io() on rsnd_dma_xxx()") commit 75defee0 (""ASoC: rsnd: don't call snd_pcm_period_elapsed() under spin lock") commit 9b99e9a7 ("ASoC: rsnd: don't use rsnd_mod_to_io() on rsnd_dma_xxx()") commit d5bbe7de ("ASoC: rsnd: move rsnd_mod_is_working() to rsnd_io_is_working()") Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
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Ryo Kataoka authored
When R-Car I2C detects stop condition of other master after arbitration lost interruption, it restarts since ESG bit of ICMCR is being set. This patch avoids restart by clearing ICMCR at arbitration lost interruption. Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
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